AMD has made a grand entrance back in the server market and is going in all guns blazing against Intel’s Xeon processors with their disruptive EPYC platform. While developing their next-gen CPUs for the server market, AMD made assumptions of where Intel’s chips will land in terms of efficiency and performance but Intel seems to be just giving away their market share due to a delayed 10nm process which will put AMD in a huge lead come next generation.
AMD: Rome (7nm Zen 2 Server Platform) Was Designed To Compete Favorably With “Ice Lake” Xeons
AMD has on multiple occasions, confirmed that their 7nm EPYC ‘Rome’ server family is on track. The most recent one was at the one year anniversary of EPYC processors based on the 14nmFF ‘Naples’ architecture. During the webinar, AMD’s Senior Vice President and General Manager of Datacenter and Embedded Solutions, Forrest Norrod, reaffirmed that 7nm EPYC Rome CPUs will be sampling in 2H 2018 and launching in 2019.
Forrest Norrod also confirmed future iterations of Zen architecture beyond 2020 which include Zen 4 and Zen 5 while will succeed the 7nm+ EPYC ‘Milan’ processors. However, when designing the EPYC server roadmap, AMD had a few goals in mind.
For AMD’s first 7nm server family specifically, AMD made assumptions around Intel’s roadmap and what they would do if they were Intel. There’s no mystery about Intel’s next-generation Xeon CPUs as we know that the Skylake-SP (14nm+) chips will be replaced by the upcoming Cascade Lake-SP (14nm++) family. We have quite a few details regarding the Cascade Lake-SP family which you can check out here but Forrest Norrod has some interesting details regarding Rome.
According to him, the AMD 7nm EPYC Rome processors were not designed to compete against the Cascade Lake-SP Xeon family, they were actually designed to compete favorably against Intel’s Ice Lake-SP Xeon processors. You heard it, right folks, AMD’s 2019 CPU family is designed to tackle the Intel 10nm Ice Lake Xeons favorably and things are looking really good for AMD as their Rome CPU family will only be competing against Intel’s 14nm++ server refreshed family, aka Cascade Lake-SP. Intel’s Ice Lake-SP processors based on 10nm process aren’t expected to arrive in the server Xeon space till 2020.
“Rome was designed to compete favorably with “Ice Lake” Xeons, but it is not going to be competing against that chip. We are incredibly excited, and it is all coming together at one point.” – Forrest Norrod. via TheNextPlatform
There’s no doubt that AMD made a grand comeback in the server space with their highly disruptive EPYC platform. Returning right on time when Intel was at their most fragile position with little to no progress being made towards the 10nm process development, stagnant IPC evolution and very less impressive feature updates on the server side. Sure Purley platform itself was supposed to deliver a good amount of features to consumers but EPYC made that look like child’s play comparison. Just to tell you how much of an impact EPYC made in the server market, Intel’s CEO, said in an interview recently that they are expecting to lose server CPU market share to AMD’s EPYC processors.
Mr. Krzanich was very matter-of-fact in saying that Intel would lose server share to AMD in the second half of the year. This wasn’t new news, but we thought it was interesting that Mr. Krzanich did not draw a firm line in the sand as it relates to AMD’s potential gains in servers; he only indicated that it was Intel’s job to not let AMD capture 15-20% market share.” – Romit Shah, Nomura Instinet
It looks like AMD is in all-guns-blazing mode, introducing a competitive and powerful lineup gen after gen. AMD is also expecting to witness multi-digit server market share gains in the coming years, up from literally 0% market share before EPYC launched. Unless or until Intel gets things straight with their CPU and core development projects and correct their fab issues, AMD is just going to keep coming back at them with a more powerful response.
Intel is expected to use a similar MCM approach to AMD’s server lineup with a Cascade Lake-AP part but AMD has the upper hand in both MCM technologies deployed on CPUs to date and they also have the lead in the number of cores deployed. Even if Intel comes out with an MCM die with more cores compared to the current maximum of 28 which will also remain true for the Xeon SP (Cascade Lake) parts, there’s no stopping AMD from deploying a 64 core, 128 thread juggernaut chip on the Rome platform while using current technologies.
“Our plan for the Naples-Rome-Milan roadmap was based on assumptions around Intel’s roadmap and our estimation of what would we do if we were Intel,” Norrod continues.
“We thought deeply about what they are like, what they are not like, what their culture is and what their likely reactions are, and we planned against a very aggressive Intel roadmap, and I really Rome and Milan and what is after them against what we thought Intel could do. And then, we come to find out that they can’t do what we thought they might be able to. And so, we have an incredible opportunity.
Rome was designed to compete favorably with “Ice Lake” Xeons, but it is not going to be competing against that chip. We are incredibly excited, and it is all coming together at one point. We have reintroduced ourselves to the market, gotten the initial traction and wins, we got the initial customer support, and we validated that AMD is a safe choice with an effective processor. With the Rome processor and process, we are going to be in an incredible position going forward.”
And it’s not only that Naples and Rome were and will be great. AMD’s next-gen 7nm+ Milan CPUs will be using the same thought process in their development so expect them to be made while keeping in mind Intel’s Xeon generation beyond Ice Lake-SP. AMD has a more mature and stronger plan panned out for the coming years in both high-end desktop and server markets and we can only hope for Intel to offer the same treatment to these markets if they don’t want to lose significant chunks of market share in all CPU segments.
AMD CPU Roadmap (2018-2020):
|Ryzen Family||Ryzen 1000 Series||Ryzen 2000 Series||Ryzen 3000 Series||Ryzen 4000 Series|
|Architecture||Zen (1)||Zen (1) / Zen+||Zen (2)||Zen (2+) / Zen (3)|
|Process Node||14nm||14nm / 12nm||7nm||7nm+ / 5nm|
|High End Server (SP3)||EPYC ‘Naples’||EPYC ‘Naples’||EPYC ‘Rome’||EPYC ‘Milan’|
|Max Server Cores / Threads||32/64||32/64||48/96?|
|High End Desktop (TR4)||Ryzen Threadripper 1000 Series||Ryzen Threadripper 2000 Series||Ryzen Threadripper 3000 Series (Castle Peak)||Ryzen Threadripper 4000 Series|
|Max HEDT Cores / Threads||16/32||32/64||TBD||TBD|
|Mainstream Desktop (AM4)||Ryzen 1000 Series (Summit Ridge)||Ryzen 2000 Series (Pinnacle Ridge)||Ryzen 3000 Series (Matisse)||Ryzen 4000 Series (Vermeer)|
|Max Mainstream Cores / Threads||8/16||8/16||TBD||TBD|
|Budget APU (AM4)||N/A||Ryzen 2000 Series (Raven Ridge)||Ryzen 3000 Series (Picasso)||Ryzen 4000 Series (Renior)|